|
Using Compressive Sensing Technique in Image Sensing
|
1402 - 02 |
|
Low Power SRAM using an Optimal Number of Split Bit Lines and Single-Ended Sensing
|
1402 - 02 |
|
A Low-Power Cyclic Vernier Time-to-Digital Converter for In Pixel Applications
|
1402 - 02 |
|
Design and Implementation of a Low Power Time-to-Digital Converter for Pixel Application
|
1401 - 09 |
|
A Low Area and Low Power Pulse Width Modulation Based Digital Pixel Sensor
|
1400 - 12 |
|
Hardware Implementation of Moving Object Detection using Adaptive Coefficient in Performing Background Subtraction Algorithm
|
1400 - 12 |
|
A High Throughput Hardware CNN Accelerator Using a Novel Multi-Layer Convolution Processor
|
1399 - 03 |
|
A Novel PWM Digital Pixel Sensor with In-pixel Memory Structure
|
1399 - 03 |
|
Reduced Complexity Architecture for Normalization of Histogram of Oriented Gradients
|
1398 - 02 |
|
Low Power Approximate Unsigned Divider Design Using Gate Diffusion Input Logic
|
1398 - 02 |
|
A low complexity hardware for compressive sensing matrix generation
|
1395 - 02 |
|
Fast and Pipelined Bit-Parallel Montgomery Multiplication and Squaring over GF(2 m)
|
1394 - 06 |
|
SDD A skin detection dataset for training and assessment of human skin classifiers
|
1394 - 06 |
|
Propagation From Conservatively Selected Skin Pixels Using a Multi-step Multi-feature Method
|
1394 - 02 |
|
A Low Power High Fill Factor and High Speed Vision Pixel in a Multitask Digital Vision Chip
|
1394 - 02 |
|
Leveraging Spatial Analysis on Homogonous Regions of Color Images for Skin Classification
|
1393 - 08 |
|
A High-Speed Low-Power Multitask Digital Vision Chip
|
1393 - 07 |
|
Reconfigurable Hardware Implementation of Gigabit UDP/IP Stack Based on Spartan-6 FPGA
|
1393 - 07 |
|
A Face Detector Based on Color and Texture
|
1393 - 07 |