Dr. Sayed Masoud Sayedi m_sayedi@iut.ac.ir Office Dept of Electrical & Computer Engineering , Isfahan University of Technology, Iran. Phone +98 (313) 3915417, 3912450 Fax +98 (313) 3912451 Positions Professor, Department of Electrical & Computer Engineering Research Interests VLSI fabrication processes Electrical characteristics of VLSI devices Analysis and design of microelectronic circuits A/D & D/A converters Vision chips Low power circuits Dr. Sayed Masoud Sayedi type: Journal Title DOI type Date Hardware design and implementation of high-efficiency cube-root of complex numbers 10.1016/j.micpro.2023.104847 Journal 2023-07 A structured review of sparse fast Fourier transform algorithms 10.1016/j.dsp.2022.103403 Journal 2022-01 Hardware Implementation of Iterative Method With Adaptive Thresholding for Random Sampling Recovery of Sparse Signals 10.1109/TVLSI.2018.2791351 Journal 2018-05 A Low-Complexity Hardware for Deterministic Compressive Sensing Reconstruction 10.1109/TCSI.2018.2803627 Journal 2018-02 Full-custom hardware implementation of point multiplication on binary Edwards curves for application-specific integrated circuit elliptic curve cryptosystem applications 10.1049/iet-cds.2017.0110 Journal 2017-11 SystemC-AMS Modeling of Photodiode Based on PWL Technique to be used in Energy Harvesting CMOS Image Sensor 10.1016/j.vlsi.2017.08.006 Journal 2017-09 High Resolution Digital Imager Based on Time Multiplexing Algorithm 10.1109/JSEN.2017.2682226 Journal 2017-05 Efficient and low0complexity hardware architecture of Gaussian normal basis multiplication over GF (2 m ) for elliptic curve cryptosystems 10.1049/iet-cds.2015.0337 Journal 2017-03 High-performance and high-speed implementation of polynomial basis Itoh Tsujii inversion algorithm over GF(2 m ) 10.1049/iet-ifs.2015.0461 Journal 2017-03 An efficient and high-speed VLSI implementation of optimal normal basis multiplication over GF(2m) 10.1016/j.vlsi.2016.05.006 Journal 2016-09