Articles

type: Journal
Title DOI Date Conference / journal
A Novel Pulse Width Modulation Digital Pixel Sensor with Energy Harvesting Capability 10.1142/S0218126626502300 JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
A Multi-Mode Energy-Efficient CMOS Image Sensor Based on Compressive Sensing Technique 10.1007/s40998-025-00914-2 Iranian Journal of Science and Technology-Transactions of Electrical Engineering
Spintronic Content Addressable Memory With Integrated Boolean Logic and Arithmetic Functions 10.1109/ACCESS.2025.3551411 IEEE Access
Hardware design and implementation of high-efficiency cube-root of complex numbers 10.1016/j.micpro.2023.104847
A structured review of sparse fast Fourier transform algorithms 10.1016/j.dsp.2022.103403
Hardware Implementation of Iterative Method With Adaptive Thresholding for Random Sampling Recovery of Sparse Signals 10.1109/TVLSI.2018.2791351
A Low-Complexity Hardware for Deterministic Compressive Sensing Reconstruction 10.1109/TCSI.2018.2803627
type: Conference
Title Date Conference / journal
Design of a Retinal Prosthesis Circuit With In-pixel Edge Detection Capability 33rd International Conference on Electrical Engineering (ICEE2025)
سي و سومين كنفرانس بين المللي مهندسي برق
Using GDI Structure in Hardware Implementation of Convolution Operation in Deep Neural Networks 2024 6th Iranian International Conference on Microelectronics (IICM)
ششمين كنفرانس بين المللي ميكروالكترونيك ايران
A Low-Power Cyclic Vernier Time-to-Digital Converter for In Pixel Applications
Using Compressive Sensing Technique in Image Sensing
Low Power SRAM using an Optimal Number of Split Bit Lines and Single-Ended Sensing
پياده سازي سخت افزاري الگوريتم تشخيص حركت توسط حسگر بينايي CMOS
Design and Implementation of a Low Power Time-to-Digital Converter for Pixel Application
A Low Area and Low Power Pulse Width Modulation Based Digital Pixel Sensor
Hardware Implementation of Moving Object Detection using Adaptive Coefficient in Performing Background Subtraction Algorithm
A High Throughput Hardware CNN Accelerator Using a Novel Multi-Layer Convolution Processor
A Novel PWM Digital Pixel Sensor with In-pixel Memory Structure
Reduced Complexity Architecture for Normalization of Histogram of Oriented Gradients
Low Power Approximate Unsigned Divider Design Using Gate Diffusion Input Logic