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Dr.Reza Rezaeian Farashahi
Assistant Professor of Mathematical Sciences
en
FPGA based fast and high-throughput 2-slow retiming 128-bit AES encryption algorithm
Date : 1393-05-15
doi
NULL
Article type
Journal
Dr.Reza Rezaeian Farashahi
https://people.iut.ac.ir/en/content/117791
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